首页期刊简介编委会投稿启事审稿流程读者订阅广告服务联系我们English
引用本文
  •    [点击复制]
  •    [点击复制]
【打印本页】 【下载PDF全文】 查看/发表评论下载PDF阅读器关闭

←前一篇|后一篇→

过刊浏览    高级检索

本文已被:浏览 316次   下载 93 本文二维码信息
码上扫一扫!
时变多普勒衰落信道硬件模拟的FPGA实现
赵智全,朱秋明,罗艳强,郎杰,张涛涛
0
(南京航空航天大学 江苏省物联网与控制技术重点实验室,南京 210016;中国空空导弹研究院,河南 洛阳 471009;中国洛阳电子装备试验中心,河南 洛阳 471003)
摘要:
针对不同散射环境下衰落信道具有不同的多普勒功率谱形状,提出了一种改进的复谐波叠加模型用于时变多普勒衰落信道的模拟,仿真分析了该方法输出信道衰落的幅值及相位连续性,并据此设计了基于FPGA硬件平台的时变多普勒衰落信道模拟器。硬件实测结果表明,该模拟器输出的时变多普勒功率谱与理论仿真非常吻合,可用于实际中多普勒功率谱实时变化场景的模拟。
关键词:  信道模拟器  时变多普勒衰落信道  多普勒功率谱  复谐波叠加
DOI:
基金项目:国家重大科学仪器设备开发专项(2013YQ200607);江苏省博士后基金资助项目(1601017C);江苏省物联网与控制技术重点实验室基金资助项目(NJ20160027)
FPGA implementation of fading channels with time-varying Doppler spectrums
ZHAO Zhiquan,ZHU Qiuming,LUO Yanqiang,LANG Jie,ZHANG Taotao
()
Abstract:
Since the wireless fading channel has different shapes of Doppler power spectrum density(DPSD) under different scattering scenarios,an improved Sum-of-Cisoids(SoC) based simulation model is proposed to reproduce the fading channels with time-varying DPSDs.Meanwhile,the continuities of output fading amplitude and phase are analyzed and validated by simulations.Based on the proposed simulation model,a channel emulator is designed and implemented on the FPGA hardware platform.The measured results show that the output DPSDs agree well with the theoretical and simulated ones,which means the proposed emulator can be used to simulate the channel fading with time-varying DPSDs.
Key words:  channel emulator  time-varying Doppler fading channel  Doppler power spectrum density(DPSD)  sum-of-cisoids(SOC)
安全联盟站长平台